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Please i don't have a test for this chall in ruby :/
It is a standard that is part of the intel doc that means that we will use values that we can't predict for example non immediate values.
Really, you are assuming way too much prior knowledge.
What is an RM mod?
"It's a standard" means nothing to me.
So indeed this is the basis for creating an x86 disassembler, however in this challenge I do not ask to implement the whole algorithm it would be too long! I only ask to work with the 11 Register Adressing mode, this mode simply means that we won't work with immediate values nor with displacements (mov eax, DWORD [ebp+0x8]). Instead we will work with two registers (move eax, eax; add edi, esi).
I have only implemented in ruby the 32 bits table. And for the iarch=32 it is simply to specify that we will work with 32 bits instructions it is true that in the case of the challenge it is not useful I will remove it.
okay look
0b11 => Register adressing example => mov eax, edi
0b01 => Displacement of 8 bits so 1 byte example => mov eax, DWORD [EBP+0x8]
its ok?
No, I don't want the answer. Well, not that answer.
There was so much supporting information ( and presented less than optimally ) I did not read ( all of ) it, so the question in the last paragraph is an honest one with incomplete information. I tried to convey I do not understand the task, and am asking questions based on possibly wrong hypotheticals, which I tried to make explicit.
I would still like to know what an "R/M mod" is. I still can't place the whole concept. This is idle curiosity; it's not like I will be attempting the kata anyway. Is it a module? A moderator? A modification? Do I need to know what it is to program in assembly? In x86 assembly? In a specific assembly language? What do R and M stand for? What is a displacement?
Really, it's gibberish to me. Punctuation and/or line breaks might help.
It seems something between a simple register decoder and a full x86 disassembler, but it isn't clear what should be decoded. All instructions in
opcode_table
? There are instructions with 8/16/32 bit immediate value, jumps with relative address, ...Why there is a
iarch
parameter? There can be 16/64bit-mode instructions?Why there is a
src
field inopcode_table
?Do you want me to give you the answer too ^^? The first table is the opcode table, the second is the r/m mod table. I explained how to do it manually if you think you can understand the steps to develop the algorithm and therefore to use the tables provided. Of course I made the tables so that you don't have to spend hours to implement them again but if you want to implement them yourself there is no problem.
My ears are ringing ( and my eyes hurt ). I still don't know what an "R/M mod" is; I have an inkling that "mod" is actually an abbreviation of "mode". "R" and "M" are still unaccounted for.
The order of your description could be improved - concepts are often explained after they are used, or not at all. Lots of sentences apparently miss commas, semicolons and/or line breaks. Check if all the line breaks you intended to include are rendered.
Describing a task in one line, then having solver wade through page upon page with numerous huge tables makes me wonder: could this kata do without all the technical mumbo jumbo? Can that task be set without all the tables? Maybe there is no task left at that point, and the point is translating all those tables, but if the tables are setting for the task but the setting is essentially arbitrary, maybe find a simpler setting. Even if I spoke Ruby ( which I don't ), I would not be wading through all those pages after that simple first line "develop an algorithm to decode opcodes".
I have updated the tests and the description.
I have updated the tests and the description.
What even is "the R/M mod" ?
Googling didn't really help - an actual spec and/or a link to a good explanation would really help.
thanks you i will fix that
I will fix that. thank you
edit: you should read all of this
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